European Exascale System Interconnect and Storage
ExaNeSt Publications:

General (slides, posters):

General (papers):

  • "The next Generation of Exascale-class Systems: the ExaNeSt Project". Appears in: the Proceedings of the Euromicro Conference on Digital System Design (DSD 2017), Vienna, Austria, 30 August - 1 September, 2017, by R. Ammendola, A. Biagioni, P. Cretaro, O. Frezza, F. Lo Cicero, A. Lonardo, M. Martinelli, P. S. Paolucci, E. Pastorelli, F. Simula, P. Vicini, G. Taffoni, John Goodacre, Mikel Lujn, J. Navaridas, J. P. Saiz, N. Chrysos, and M. Katevenis for the ExaNeSt team. Copyright © IEEE 2017. DOI: [10.5281/zenodo.823595]
  • "The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems", (Slides / Paper), Limassol (Euromicro DSD 2016), 31 Aug. - 2 Sept. 2016 by: M. Katevenis, N. Chrysos, M. Marazakis, I. Mavroidis, F. Chaix, N. Kallimanis, J. Navaridas, J. Goodacre, P. Vicini, A. Biagioni, P. S. Paolucci, A. Lonardo, E. Pastorelli, F. Lo Cicero, R. Ammendola, P. Hopton, P. Coates, G. Taffoni, S. Cozzini, M. Kersten, Y. Zhang, J. Sahuquillo, S. Lechago, C. Pinto, B. Lietzow, D. Everett, and G. Perna.  Copyright © IEEE 2016. DOI: [10.1109/DSD.2016.106]




Storage & Data Access:


Other Deliverables: