European Exascale System Interconnect and Storage
ExaNeSt Publications:

General (slides, posters):

General (papers):

  • "The next Generation of Exascale-class Systems: the ExaNeSt Project". Appears in: the Proceedings of the Euromicro Conference on Digital System Design (DSD 2017), Vienna, Austria, 30 August - 1 September, 2017, by R. Ammendola, A. Biagioni, P. Cretaro, O. Frezza, F. Lo Cicero, A. Lonardo, M. Martinelli, P. S. Paolucci, E. Pastorelli, F. Simula, P. Vicini, G. Taffoni, John Goodacre, Mikel Lujn, J. Navaridas, J. P. Saiz, N. Chrysos, and M. Katevenis for the ExaNeSt team. Copyright © IEEE 2017. DOI: [10.5281/zenodo.823595]

Applications:

Interconnects:

  • "On-chip wireless silicon photonics: from reconfigurable interconnects to lab-on-chip devices", by Carlos García-Meca, Sergio Lechago, Antoine Brimont, Amadeu Griol, Sara Mas, Luis Sánchez, Laurent Bellieres, Nuria S Losilla & Javier Martí. Na-ture: Light Science & Applications (2017) 6, e17053, 22 September 2017. DOI: [10.1038/lsa.2017.53]
  • "Low latency network and distributed storage for next generation HPC systems: the ExaNeSt project"; by R. Ammendola, A. Biagioni, P. Cretaro, O. Frezza, F. Lo Cice-ro, A. Lonardo, M. Martinelli, P. S. Paolucci, E. Pastorelli, F. Pisani, F. Simula, P. Vi-cini, J. Navaridas, F. Chaix, N. Chrysos, M. Katevenis, V. Papaeustathiou, Journal of Physics: Conference Series, vol. 898, no. 8, p. 082045, November 2017. DOI: [10.1088/1742-6596/898/8/082045]
  • "Modeling a Photonic Network for Exascale Computing", by Jose Duro, Salvador Petit, Julio Sahuquillo and Maria E. Gomez. Appears in: Proceedings of the the 3rd International Workshop on Modeling and Simulation of Parallel and Distributed Systems (MSPDS 2017) , Genoa, Italy, July 17-21, 2017. DOI: [10.5281/zenodo.823624]
  • "Designing an Exascale Interconnect using Multi-objective Optimization", by Jose A. Pascual, Joshua Lant, Andrew Attwood, Caroline Concatto, Javier Navaridas, Mikel Lujan and John Goodacre. Appears in the 2017 IEEE Congress on Evolutionary Computation, San Sebastian, Spain, June 2017. DOI: [10.1109/CEC.2017.7969572]
  • "Accurately Modeling a Photonic NoC in a Detailed CMP Simulation Framework", by Jose Puche, Sergio Lechago, Salvador Petit, María E. Gómez and Julio Sahuquillo. Appears in : Proceedings of the Workshop on Modeling and Simulation of Parallel and Distributed Systems (in conjunction with the High Performance Computing & Simulation (HPCS) conference), 2016. DOI: [10.5281/zenodo.804004]
  • "Challenges and Opportunities in Exascale-Computing Interconnects": Keynote Talk, given by Manolis Katevenis and Nikolaos Chrysos, at the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISTECS 2016), held in conjunction with the HiPEAC 2016 Conference, Prague, Czech Republic, 18 January 2016. DOI: [10.5281/zenodo.802230]
  • "Dynamic Max-Min Fair Rate Regulation Apparatuses, Methods, and Systems": US Patent Application Number 14/864,355 filed 24 Sep 2015, and Int. (EPO) Application Number PCT/EP2015/072048; by Manolis Katevenis, FORTH (work started in the EuroServer project, then continued in the ExaNeSt project).  See also USPTO Publication Number US 2016/0087899 A1, published on 24 Mar 2016.

Storage & Data Access:

Virtualization:

Other Deliverables: